void setup() {
// CTC, OC0A toggle on compare match, prescale 1/8
TCCR0A = _BV(COM0A0)|_BV(WGM01);
TCCR0B = _BV(CS01);
// toggle every 35.5 μs at 16 MHz and 1/8 prescale
OCR0A = 70;
// phase and frequency correct PWM, TOP is OCR1A, OC1C clear on comparegoing matchup and set atgoing BOTTOMdown, no prescale
TCCR1A = _BV(COM1C1)|_BV(WGM10);
TCCR1B = _BV(WGM13)|_BV(CS10);
// period of 2 ms at 16 MHz and no prescale
OCR1A = 16000;
// on-time of 1 ms at 16 MHz and no prescale
OCR1C = 8000;
// no interrupts from the timers
TIMSK0 = 0;
TIMSK1 = 0;
// only output a 1 when both timers are outputting a 1
PORTB &= ~_BV(PORTB7);
// halt the timers and reset the prescaler
GTCCR |= _BV(TSM);
GTCCR |= _BV(PSRSYNC);
// reset both timers
TCNT0 = 0;
TCNT1 = 0;
// enable output
DDRB |= _BV(DDB7);
// let the timers run
GTCCR &= ~_BV(TSM);
}
void loop() {
// Just adjust the frequencies and duty cycle as required here.
// Everything is handled by the hardware and takes effect immediately upon writing to the register.
// OCR1A: the desired period of the slower signal, in 8ths of microseconds. Can be up to 65535.
// OCR1C: the desired on-time of the slower signal, in 8ths of microseconds. Can be up to 65535.
// OCR0A: 1 less than the desired period of the faster signal, in microseconds. Can be up to 255.
// The on-time of the faster signal is always half of the period.
// If necessary, you can trade precision for more range for any of the above values by adjusting the prescaler.
}
Joseph Sible-Reinstate Monica
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Joseph Sible-Reinstate Monica
- 153
- 2
- 11
Joseph Sible-Reinstate Monica
- 153
- 2
- 11
Joseph Sible-Reinstate Monica
- 153
- 2
- 11