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answers

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Can I generate HDL Code for models with Xilinx System Generator blocks?

Asked by MathWorks Support Team on 8 Apr 2020

Latest activity Edited by MathWorks Support Team on 10 Nov 2025 at 11:49

Accepted Answer by MathWorks Support Team

Code Generation HDL Coder HDL Code Generation from Simulink Model and Architecture Design External Component Interfaces

1

answer

2 votes
381 views

Which versions of Vivado are supported with which release of HDL Coder?

Asked by MathWorks Support Team on 16 Apr 2020

Latest activity Edited by MathWorks Support Team on 29 Sep 2025

Accepted Answer by MathWorks Support Team

Code Generation HDL Coder Get Started with HDL Coder

1

answer

0 votes
4 views

Why do I receive the message "No matching files were found" in HDL Workflow Advisor Step 4.2 "Build FPGA Bitstream"?

Asked by MathWorks Support Team on 21 Jun 2019

Latest activity Edited by MathWorks Support Team on 9 Jul 2025

Accepted Answer by MathWorks Support Team

Code Generation HDL Coder HDL Coder Supported Hardware Intel FPGA and SoC Devices

Find Documentation, Examples and more on HDL Coder in Help Center

1

answer

0 votes
4 views

code c generation in matlab

Asked by mohsen salehi on 28 Nov 2017

Latest activity Commented on by mehmet on 20 Mar 2025

Code Generation HDL Coder Targeting FPGA & SoC Hardware

1

answer

0 votes
50 views

Troubleshooting connection issues with Xilinx Zynq platform

Asked by MathWorks Support Team on 3 Jul 2018

Latest activity Edited by MathWorks Support Team on 4 Mar 2025

Accepted Answer by MathWorks Support Team

Code Generation HDL Coder HDL Coder Supported Hardware AMD FPGA and SoC Devices

2

answers

0 votes
15 views

Which versions of Xilinx Vivado are supported with which release of HDL Workflow Advisor?

Asked by Onur Dikilitas on 27 Jun 2022

Latest activity Answered by Stefanie Schwarz on 9 Feb 2025

Code Generation HDL Coder Get Started with HDL Coder

Find Code on HDL Coder in File Exchange

2

answers

0 votes
6 views

How to generate SVPWM using HDL code

Asked by Kyungmin on 8 May 2023

Latest activity Edited by KrishnaKumar on 19 Jan 2024

Code Generation HDL Coder

4

answers

0 votes
34 views

How can I convert MATLAB Code to VHDL Code?

Asked by Sabarinathan Vadivelu on 8 Mar 2013

Latest activity Answered by Bharath Venkataraman on 5 Jan 2024

Accepted Answer by TAB

Code Generation HDL Coder

1

answer

0 votes
2 views

PDF Documentation for "Deep Learning HDL Toolbox Support Package for Intel / Xilinx FPGA and SoC Devices"

Asked by MathWorks Support Team on 14 Oct 2020

Latest activity Edited by MathWorks Support Team on 24 Dec 2023

Accepted Answer by MathWorks Support Team

Code Generation HDL Coder HDL Coder Supported Hardware AMD FPGA and SoC Devices

2

answers

0 votes
4 views

Lane Detection with Zynq-Based Hardware - Pixel-Stream Model

Asked by Krishnent Sanal Kumar on 21 Jun 2018

Latest activity Answered by Eric Cigan on 18 Dec 2023

Accepted Answer by Bharath Venkataraman

Code Generation HDL Coder HDL Coder Supported Hardware AMD FPGA and SoC Devices

2

answers

0 votes
1 view

HDL workflow Advisor image

Asked by Yu Chen on 1 Jul 2018

Latest activity Answered by Eric Cigan on 18 Dec 2023

Code Generation HDL Coder HDL Coder Supported Hardware AMD FPGA and SoC Devices

1

answer

0 votes
0 views

Real-time data exchange of Simulink and Zynq-7000

Asked by Armin Lensker on 1 Mar 2018

Latest activity Commented on by Sam on 16 Nov 2023

Code Generation HDL Coder HDL Coder Supported Hardware AMD FPGA and SoC Devices

4

answers

0 votes
7 views

Problem with the Connecttion between Zybo Z7 20 and Matlab

Asked by Li Qian on 1 Aug 2018

Latest activity Edited by 佳禹 on 16 Sep 2023

Code Generation HDL Coder Targeting FPGA & SoC Hardware

1

answer

0 votes
1 view

HDL-Coder: initialization of internal VHDL-signals

Asked by Dennis Kaupmann on 29 Mar 2018

Latest activity Answered by Kiran Kintali on 16 Jul 2023

Code Generation HDL Coder Get Started with HDL Coder

1

answer

0 votes
9 views

To what degree are MathWorks drivers and libraries involved in the new ADI libiio based Linux images for Zynq + AD9361 targets?

Asked by Terje Olsen on 4 Dec 2019

Latest activity Commented on by Rimsha Javed on 7 Jun 2023

Accepted Answer by Ousman Sadiq

Code Generation HDL Coder Targeting FPGA & SoC Hardware

2

answers

3 votes
2 views

Generic port length when integrating existing HDL code with Simulink model using BlackBox

Asked by evyatar d on 16 Jan 2020

Latest activity Commented on by Kiran Kintali on 31 May 2023

Accepted Answer by Kiran Kintali

Code Generation HDL Coder HDL Code Generation from Simulink Model and Architecture Design External Component Interfaces

2

answers

0 votes
4 views

Accessing XADC in ZYNQ SOC (Zedboard) using Simulink (or Xilinx System Generator for matlab)

Asked by Anirudh Acharya on 30 Sep 2015

Latest activity Answered by Shoumei on 19 Apr 2023

Code Generation HDL Coder HDL Coder Supported Hardware AMD FPGA and SoC Devices

1

answer

0 votes
1 view

Introduce Zybo board in Simulink HDL coder workflow advisor

Asked by Juan Valverde on 6 Jul 2015

Latest activity Answered by Kiran Kintali on 6 Mar 2023

Code Generation HDL Coder Targeting FPGA & SoC Hardware

2

answers

0 votes
20 views

Xilinx Zynq ZCU104 evaluation board support

Asked by Florian Brunbauer on 16 May 2019

Latest activity Answered by Kiran Kintali on 6 Mar 2023

Code Generation HDL Coder HDL Coder Supported Hardware AMD FPGA and SoC Devices

2

answers

0 votes
1 view

Wrap Xilinx IP in Simulink black box

Asked by Talon Myburgh on 30 Jul 2020

Latest activity Commented on by Talon Myburgh on 1 Dec 2022

Code Generation HDL Coder HDL Code Generation from Simulink Model and Architecture Design External Component Interfaces

1

answer

0 votes
3 views

Unable to create project in xilinx vivado 2015.2 from simulink using hdl workflow adviser,Getting error [12-172],how can get pass this?

Asked by Ariz Wakil on 30 Mar 2017

Latest activity Commented on by Rizwan on 28 Jul 2022

Code Generation HDL Coder HDL Coder Supported Hardware AMD FPGA and SoC Devices

2

answers

1 vote
6 views

Where I can get HDL Coder and Embedded Coder for Home license?

Asked by f1y0rdie on 11 Sep 2014

Latest activity Commented on by Xymbu on 30 Jun 2022

Accepted Answer by Shantanu Kedar

Code Generation HDL Coder HDL Coder Supported Hardware AMD FPGA and SoC Devices

1

answer

0 votes
2 views

Is it possible to create a custom board for the HDL Coder with the zynq z7100

Asked by Patrick Ebner on 30 Oct 2017

Latest activity Edited by Stefanie Schwarz on 29 Jun 2022

Accepted Answer by Wang Chen

Code Generation HDL Coder Targeting FPGA & SoC Hardware

2

answers

0 votes
17 views

Communication from processor (PS) to the FPGA (PL) via AXI4-lite

Asked by Quoc Viet Bui on 15 Jan 2020

Latest activity Answered by Steve Kuznicki on 26 Apr 2022

Accepted Answer by Steve Kuznicki

Code Generation HDL Coder Targeting FPGA & SoC Hardware

1

answer

0 votes
6 views

Hardware Software Co-design support for ZCU111

Asked by Aunullah Qaiser on 26 Feb 2020

Latest activity Commented on by Kefayet Ullah on 14 Apr 2022

Code Generation HDL Coder Targeting FPGA & SoC Hardware

1

answer

0 votes
3 views

Can I get a list of Altera FPGA boards supported by matlab/simulink?

Asked by VINAL PATEL on 16 Sep 2016

Latest activity Commented on by SimTec on 26 Jan 2022

Code Generation HDL Coder Targeting FPGA & SoC Hardware

1

answer

1 vote
18 views

Which Xilinx Vivado edition do I need to install for use with HDL Coder, HDL Verifier, or other HDL-related toolboxes?

Asked by MathWorks Support Team on 16 Apr 2020

Latest activity Edited by MathWorks Support Team on 24 Jan 2022

Accepted Answer by MathWorks Support Team

Code Generation HDL Coder Get Started with HDL Coder

2

answers

0 votes
0 views

How to generate synthesizable VHDL from Simulink block?

Asked by djalal ACHACHA on 15 May 2013

Latest activity Edited by Stefanie Schwarz on 8 Oct 2021

Accepted Answer by Tim McBrayer

Code Generation HDL Coder HDL Code Generation from Simulink

3

answers

0 votes
1 view

Getting Started with Targeting Xilinx Zynq Platform

Asked by Vishnu Narayan Vipin on 11 Nov 2020

Latest activity Commented on by Andrew Brennan on 17 Sep 2021

Accepted Answer by Vishnu Narayan Vipin

Code Generation HDL Coder HDL Coder Supported Hardware AMD FPGA and SoC Devices

1

answer

0 votes
8 views

MATLAB 2018a HDL-coder : Failed Program target FPGA device.

Asked by michael brewin on 16 Jan 2019

Latest activity Edited by Kiran Kintali on 22 Jun 2021

Code Generation HDL Coder HDL Coder Supported Hardware AMD FPGA and SoC Devices

1

answer

0 votes
5 views

Does HDL coder from Simulink support AXI-4 Stream Interface for Xilinx Zynq?

Asked by owen chang on 28 Aug 2013

Latest activity Answered by Kiran Kintali on 24 May 2021

Code Generation HDL Coder HDL Coder Supported Hardware AMD FPGA and SoC Devices

1

answer

0 votes
1 view

HDL Reciprocal speed limitation?

Asked by legendbb on 31 Oct 2014

Latest activity Answered by Kiran Kintali on 6 Apr 2021

Code Generation HDL Coder HDL Code Generation from Simulink Speed and Area Optimization Speed Optimization

1

answer

0 votes
4 views

Required Linux image / utilitys for IntelSoC custom boards

Asked by Dominique Görner on 13 Jan 2020

Latest activity Commented on by JT Ferrara on 11 Feb 2021

Accepted Answer by JT Ferrara

Code Generation HDL Coder HDL Coder Supported Hardware Intel FPGA and SoC Devices

1

answer

0 votes
2 views

error while programming hardware :device arm dap_1 is not programmable

Asked by Aravind kumar pallerla on 20 Aug 2020

Latest activity Commented on by Eduardo Flores on 29 Nov 2020

Accepted Answer by Kiran Kintali

Code Generation HDL Coder HDL Coder Supported Hardware AMD FPGA and SoC Devices

1

answer

0 votes
5 views

"Error: Synthesis failed", "HDL compilation failed"

Asked by andrew kurtz on 26 Nov 2018

Latest activity Edited by xioabo li on 20 Nov 2020

Code Generation HDL Coder HDL Coder Supported Hardware AMD FPGA and SoC Devices

1

answer

0 votes
3 views

HDL coder and Embedded coder interaction

Asked by kimi on 14 Nov 2020

Latest activity Answered by Kiran Kintali on 15 Nov 2020

Accepted Answer by Kiran Kintali

Code Generation HDL Coder HDL Coder Supported Hardware AMD FPGA and SoC Devices

1

answer

0 votes
3 views

Can I use the aximaster object from the HDL Verifier Support Package for Xilinx devices with a Xilinx Platform Cable?

Asked by Ben Marshall on 21 Apr 2020

Latest activity Answered by Tianqi Liu on 11 Nov 2020

Code Generation HDL Coder HDL Coder Supported Hardware AMD FPGA and SoC Devices

1

answer

0 votes
2 views

hdl coder ram usage and source optimizaion

Asked by Fahri Gürbüz on 7 Jul 2020

Latest activity Answered by Kiran Kintali on 1 Nov 2020

Accepted Answer by Kiran Kintali

Code Generation HDL Coder HDL Code Generation from MATLAB Speed and Area Optimization

1

answer

0 votes
9 views

DE-10 Nano development kit

Asked by Nawaf Hassan on 5 Oct 2020

Latest activity Answered by Kiran Kintali on 24 Oct 2020

Code Generation HDL Coder Targeting FPGA & SoC Hardware

1

answer

0 votes
1 view

How to do speed optimizations with/in feedback Loops? -Simulink HDL Coder

Asked by Lars Boschert on 9 Nov 2017

Latest activity Answered by Kiran Kintali on 20 Oct 2020

Code Generation HDL Coder HDL Code Generation from Simulink Speed and Area Optimization Speed Optimization

1

answer

0 votes
2 views

How to use genetic xilinx platform in HDL coder.

Asked by Suphadet Vatjanajaroenrat on 7 Sep 2018

Latest activity Answered by Kiran Kintali on 20 Oct 2020

Code Generation HDL Coder Targeting FPGA & SoC Hardware

1

answer

0 votes
7 views

DE-10 Nano development kit

Asked by Nawaf Hassan on 2 Oct 2020

Latest activity Answered by Kiran Kintali on 2 Oct 2020

Code Generation HDL Coder Targeting FPGA & SoC Hardware

1

answer

0 votes
3 views

Custom Convolution neural network model code conversion for FPGA

Asked by Ali Shahid on 24 Sep 2020

Latest activity Answered by Kiran Kintali on 24 Sep 2020

Code Generation HDL Coder Targeting FPGA & SoC Hardware

2

answers

0 votes
1 view

Is Deep Learning HDL Toolbox supports Xilinx All Programmable 7000 ZC702 board?

Asked by TURIMERLA PRATAP on 20 Sep 2020

Latest activity Commented on by stozaki on 20 Sep 2020

Code Generation HDL Coder Targeting FPGA & SoC Hardware

1

answer

0 votes
8 views

HDL coder and verifier: Xilinx Arty S7-25 vs S7-50

Asked by S Cla on 17 Sep 2020

Latest activity Commented on by Kiran Kintali on 18 Sep 2020

Code Generation HDL Coder HDL Coder Supported Hardware AMD FPGA and SoC Devices

1

answer

0 votes
5 views

How to implement LSTM on Alter FPGA

Asked by Sameer Ahmad Bhat on 14 Aug 2020

Latest activity Answered by Aman Vyas on 16 Aug 2020

Code Generation HDL Coder HDL Coder Supported Hardware Intel FPGA and SoC Devices

1

answer

0 votes
10 views

How to optimize multiplications with hdl coder

Asked by Dominik Hiltbrunner on 21 Jul 2020

Latest activity Edited by Kiran Kintali on 24 Jul 2020

Code Generation HDL Coder HDL Code Generation from Simulink Speed and Area Optimization

2

answers

0 votes
3 views

Internal Error in generation of HDL IP core for a Xilinx platform

Asked by Tomaso Poggi on 16 Jul 2020

Latest activity Answered by Kiran Kintali on 20 Jul 2020

Code Generation HDL Coder HDL Coder Supported Hardware AMD FPGA and SoC Devices

1

answer

0 votes
3 views

HDL Coder - Generate IP Core with Vivado 2015

Asked by Zachary Blair on 11 Jan 2016

Latest activity Commented on by kheddara rania on 10 Jul 2020

Code Generation HDL Coder Targeting FPGA & SoC Hardware Generate IP Core and Bitstream

2

answers

2 votes
8 views

Xilinx Vivado 2019.1 or 2018.3 support?

Asked by amin ya on 28 Jul 2019

Latest activity Commented on by Stefanie Schwarz on 10 Jul 2020

Accepted Answer by Stefanie Schwarz

Code Generation HDL Coder Get Started with HDL Coder

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