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answer

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Why do I receive the message "No matching files were found" in HDL Workflow Advisor Step 4.2 "Build FPGA Bitstream"?

Asked by MathWorks Support Team on 21 Jun 2019

Latest activity Edited by MathWorks Support Team on 9 Jul 2025

Accepted Answer by MathWorks Support Team

Code Generation HDL Coder HDL Coder Supported Hardware Intel FPGA and SoC Devices

1

answer

0 votes
61 views

Troubleshooting connection issues with Xilinx Zynq platform

Asked by MathWorks Support Team on 3 Jul 2018

Latest activity Edited by MathWorks Support Team on 4 Mar 2025

Accepted Answer by MathWorks Support Team

Code Generation HDL Coder HDL Coder Supported Hardware AMD FPGA and SoC Devices

1

answer

0 votes
3 views

PDF Documentation for "Deep Learning HDL Toolbox Support Package for Intel / Xilinx FPGA and SoC Devices"

Asked by MathWorks Support Team on 14 Oct 2020

Latest activity Edited by MathWorks Support Team on 24 Dec 2023

Accepted Answer by MathWorks Support Team

Code Generation HDL Coder HDL Coder Supported Hardware AMD FPGA and SoC Devices

Find Documentation, Examples and more on HDL Coder Supported Hardware in Help Center

2

answers

0 votes
6 views

Lane Detection with Zynq-Based Hardware - Pixel-Stream Model

Asked by Krishnent Sanal Kumar on 21 Jun 2018

Latest activity Answered by Eric Cigan on 18 Dec 2023

Accepted Answer by Bharath Venkataraman

Code Generation HDL Coder HDL Coder Supported Hardware AMD FPGA and SoC Devices

2

answers

0 votes
5 views

HDL workflow Advisor image

Asked by Yu Chen on 1 Jul 2018

Latest activity Answered by Eric Cigan on 18 Dec 2023

Code Generation HDL Coder HDL Coder Supported Hardware AMD FPGA and SoC Devices

1

answer

0 votes
3 views

Real-time data exchange of Simulink and Zynq-7000

Asked by Armin Lensker on 1 Mar 2018

Latest activity Commented on by Sam on 16 Nov 2023

Code Generation HDL Coder HDL Coder Supported Hardware AMD FPGA and SoC Devices

Find Code on HDL Coder Supported Hardware in File Exchange

1

answer

0 votes
8 views

To what degree are MathWorks drivers and libraries involved in the new ADI libiio based Linux images for Zynq + AD9361 targets?

Asked by Terje Olsen on 4 Dec 2019

Latest activity Commented on by Rimsha Javed on 7 Jun 2023

Accepted Answer by Ousman Sadiq

Code Generation HDL Coder HDL Coder Supported Hardware AMD FPGA and SoC Devices

2

answers

0 votes
9 views

Accessing XADC in ZYNQ SOC (Zedboard) using Simulink (or Xilinx System Generator for matlab)

Asked by Anirudh Acharya on 30 Sep 2015

Latest activity Answered by Shoumei on 19 Apr 2023

Code Generation HDL Coder HDL Coder Supported Hardware AMD FPGA and SoC Devices

2

answers

0 votes
21 views

Xilinx Zynq ZCU104 evaluation board support

Asked by Florian Brunbauer on 16 May 2019

Latest activity Answered by Kiran Kintali on 6 Mar 2023

Code Generation HDL Coder HDL Coder Supported Hardware AMD FPGA and SoC Devices

1

answer

0 votes
3 views

Unable to create project in xilinx vivado 2015.2 from simulink using hdl workflow adviser,Getting error [12-172],how can get pass this?

Asked by Ariz Wakil on 30 Mar 2017

Latest activity Commented on by Rizwan on 28 Jul 2022

Code Generation HDL Coder HDL Coder Supported Hardware AMD FPGA and SoC Devices

2

answers

1 vote
7 views

Where I can get HDL Coder and Embedded Coder for Home license?

Asked by f1y0rdie on 11 Sep 2014

Latest activity Commented on by Xymbu on 30 Jun 2022

Accepted Answer by Shantanu Kedar

Code Generation HDL Coder HDL Coder Supported Hardware AMD FPGA and SoC Devices

1

answer

0 votes
5 views

Can I get a list of Altera FPGA boards supported by matlab/simulink?

Asked by VINAL PATEL on 16 Sep 2016

Latest activity Commented on by SimTec on 26 Jan 2022

Code Generation HDL Coder HDL Coder Supported Hardware Intel FPGA and SoC Devices

3

answers

0 votes
0 views

Getting Started with Targeting Xilinx Zynq Platform

Asked by Vishnu Narayan Vipin on 11 Nov 2020

Latest activity Commented on by Andrew Brennan on 17 Sep 2021

Accepted Answer by Vishnu Narayan Vipin

Code Generation HDL Coder HDL Coder Supported Hardware AMD FPGA and SoC Devices

1

answer

0 votes
7 views

MATLAB 2018a HDL-coder : Failed Program target FPGA device.

Asked by michael brewin on 16 Jan 2019

Latest activity Edited by Kiran Kintali on 22 Jun 2021

Code Generation HDL Coder HDL Coder Supported Hardware AMD FPGA and SoC Devices

1

answer

0 votes
5 views

Does HDL coder from Simulink support AXI-4 Stream Interface for Xilinx Zynq?

Asked by owen chang on 28 Aug 2013

Latest activity Answered by Kiran Kintali on 24 May 2021

Code Generation HDL Coder HDL Coder Supported Hardware AMD FPGA and SoC Devices

1

answer

0 votes
5 views

Required Linux image / utilitys for IntelSoC custom boards

Asked by Dominique Görner on 13 Jan 2020

Latest activity Commented on by JT Ferrara on 11 Feb 2021

Accepted Answer by JT Ferrara

Code Generation HDL Coder HDL Coder Supported Hardware Intel FPGA and SoC Devices

1

answer

0 votes
4 views

error while programming hardware :device arm dap_1 is not programmable

Asked by Aravind kumar pallerla on 20 Aug 2020

Latest activity Commented on by Eduardo Flores on 29 Nov 2020

Accepted Answer by Kiran Kintali

Code Generation HDL Coder HDL Coder Supported Hardware AMD FPGA and SoC Devices

1

answer

0 votes
3 views

"Error: Synthesis failed", "HDL compilation failed"

Asked by andrew kurtz on 26 Nov 2018

Latest activity Edited by xioabo li on 20 Nov 2020

Code Generation HDL Coder HDL Coder Supported Hardware AMD FPGA and SoC Devices

1

answer

0 votes
7 views

HDL coder and Embedded coder interaction

Asked by kimi on 14 Nov 2020

Latest activity Answered by Kiran Kintali on 15 Nov 2020

Accepted Answer by Kiran Kintali

Code Generation HDL Coder HDL Coder Supported Hardware AMD FPGA and SoC Devices

1

answer

0 votes
4 views

Can I use the aximaster object from the HDL Verifier Support Package for Xilinx devices with a Xilinx Platform Cable?

Asked by Ben Marshall on 21 Apr 2020

Latest activity Answered by Tianqi Liu on 11 Nov 2020

Code Generation HDL Coder HDL Coder Supported Hardware AMD FPGA and SoC Devices

1

answer

0 votes
8 views

DE-10 Nano development kit

Asked by Nawaf Hassan on 5 Oct 2020

Latest activity Answered by Kiran Kintali on 24 Oct 2020

Code Generation HDL Coder HDL Coder Supported Hardware Intel FPGA and SoC Devices

1

answer

0 votes
8 views

DE-10 Nano development kit

Asked by Nawaf Hassan on 2 Oct 2020

Latest activity Answered by Kiran Kintali on 2 Oct 2020

Code Generation HDL Coder HDL Coder Supported Hardware Intel FPGA and SoC Devices

1

answer

0 votes
2 views

Custom Convolution neural network model code conversion for FPGA

Asked by Ali Shahid on 24 Sep 2020

Latest activity Answered by Kiran Kintali on 24 Sep 2020

Code Generation HDL Coder HDL Coder Supported Hardware Intel FPGA and SoC Devices

2

answers

0 votes
1 view

Is Deep Learning HDL Toolbox supports Xilinx All Programmable 7000 ZC702 board?

Asked by TURIMERLA PRATAP on 20 Sep 2020

Latest activity Commented on by stozaki on 20 Sep 2020

Code Generation HDL Coder HDL Coder Supported Hardware Intel FPGA and SoC Devices

1

answer

0 votes
7 views

HDL coder and verifier: Xilinx Arty S7-25 vs S7-50

Asked by S Cla on 17 Sep 2020

Latest activity Commented on by Kiran Kintali on 18 Sep 2020

Code Generation HDL Coder HDL Coder Supported Hardware AMD FPGA and SoC Devices

1

answer

0 votes
7 views

How to implement LSTM on Alter FPGA

Asked by Sameer Ahmad Bhat on 14 Aug 2020

Latest activity Answered by Aman Vyas on 16 Aug 2020

Code Generation HDL Coder HDL Coder Supported Hardware Intel FPGA and SoC Devices

2

answers

0 votes
2 views

Internal Error in generation of HDL IP core for a Xilinx platform

Asked by Tomaso Poggi on 16 Jul 2020

Latest activity Answered by Kiran Kintali on 20 Jul 2020

Code Generation HDL Coder HDL Coder Supported Hardware AMD FPGA and SoC Devices

1

answer

0 votes
0 views

HDL code generation from simulink and dumping process

Asked by Koushik See on 17 Jun 2020

Latest activity Answered by Kiran Kintali on 22 Jun 2020

Code Generation HDL Coder HDL Coder Supported Hardware Intel FPGA and SoC Devices

1

answer

0 votes
4 views

HDL workflow adviser compatible

Asked by sameer al-obaidi on 16 Feb 2016

Latest activity Answered by Raghav Mishra on 19 Jun 2020

Code Generation HDL Coder HDL Coder Supported Hardware AMD FPGA and SoC Devices

2

answers

0 votes
2 views

hdl coder supported in Cyclone 10 LP from Intel.

Asked by Iñigo Acero Urizarbarrena on 8 May 2020

Latest activity Answered by Iñigo Acero Urizarbarrena on 13 May 2020

Accepted Answer by Kiran Kintali

Code Generation HDL Coder HDL Coder Supported Hardware Intel FPGA and SoC Devices

1

answer

0 votes
3 views

Problem in HDL workflow advisor

Asked by Jegan v v on 3 May 2020

Latest activity Answered by Sai Sri Pathuri on 7 May 2020

Code Generation HDL Coder HDL Coder Supported Hardware AMD FPGA and SoC Devices

1

answer

0 votes
11 views

How can I change the IP address of my Zynq Board (ZC706), other than the default '192.168.4.2' ? I'm using R2016a.

Asked by fenderfred on 20 Apr 2017

Latest activity Answered by adeeljsid on 28 Nov 2019

Code Generation HDL Coder HDL Coder Supported Hardware AMD FPGA and SoC Devices

0

answers

0 votes
3 views

Analog Devices Inc HDL IP

Asked by Melanie Gleep on 19 Aug 2019

Code Generation HDL Coder HDL Coder Supported Hardware AMD FPGA and SoC Devices

1

answer

0 votes
7 views

Zynq Radio QPSK receiver example errors with "block_diagram does not have a parameter named 'HDLCodeGenStatus'

Asked by Neil MacEwen on 14 Aug 2019

Latest activity Answered by Neil MacEwen on 14 Aug 2019

Accepted Answer by Neil MacEwen

Code Generation HDL Coder HDL Coder Supported Hardware AMD FPGA and SoC Devices

3

answers

1 vote
9 views

Not able to connect zynq7010 to MATLAB

Asked by TARIQ ABDUL RAHMAN on 19 Mar 2019

Latest activity Answered by Stefanie Schwarz on 17 Jul 2019

Code Generation HDL Coder HDL Coder Supported Hardware AMD FPGA and SoC Devices

1

answer

0 votes
5 views

HDL workflow advisor: how to make use of 'external port' in the target platform interfaces

Asked by Leow Cheah Wei on 1 Nov 2016

Latest activity Commented on by Nadereh Rooein on 12 Jun 2019

Code Generation HDL Coder HDL Coder Supported Hardware AMD FPGA and SoC Devices

0

answers

1 vote
2 views

Error in HDL Code Generation "Colon operands must have integer values when interacting with type 'embedded.fi'."

Asked by Alexander Letzel on 15 Apr 2019

Code Generation HDL Coder HDL Coder Supported Hardware AMD FPGA and SoC Devices

2

answers

0 votes
9 views

Simulink tutorials/ examples for Zynq

Asked by sunayana chakradhar on 5 Apr 2016

Latest activity Answered by Kiran Kintali on 15 Dec 2018

Code Generation HDL Coder HDL Coder Supported Hardware AMD FPGA and SoC Devices

1

answer

0 votes
4 views

How can I migrate MathWorks support on ZedBoard to Xilinx ZC702 board?

Asked by luckfy zhang on 12 Dec 2018

Latest activity Answered by Neil MacEwen on 12 Dec 2018

Accepted Answer by Neil MacEwen

Code Generation HDL Coder HDL Coder Supported Hardware AMD FPGA and SoC Devices

0

answers

0 votes
2 views

Why does Simulink default to LCC Compiler instead of using Xilinx SDK toolchain and how do I correct the tool chain?

Asked by William Katzianer on 5 Nov 2018

Code Generation HDL Coder HDL Coder Supported Hardware AMD FPGA and SoC Devices

2

answers

0 votes
4 views

Signal measurement error when using "download"-option in HDL Workflow Advisor

Asked by Frederik Knudsen on 8 Mar 2018

Latest activity Answered by Li Qian on 17 Aug 2018

Accepted Answer by Wang Chen

Code Generation HDL Coder HDL Coder Supported Hardware AMD FPGA and SoC Devices

1

answer

0 votes
3 views

HDL Coder - Can it only Generate a project with Vivado 2107.2, not Vivado 2017.4.1

Asked by michael brewin on 25 Apr 2018

Latest activity Answered by Wang Chen on 25 Apr 2018

Accepted Answer by Wang Chen

Code Generation HDL Coder HDL Coder Supported Hardware AMD FPGA and SoC Devices

1

answer

0 votes
7 views

is it possible to run the demo "Performing Large Matrix Operation on FPGA using External Memory" on Intel Altera FPGA?

Asked by Lin Bai on 18 Feb 2018

Latest activity Commented on by Lin Bai on 10 Apr 2018

Accepted Answer by Eric Cigan

Code Generation HDL Coder HDL Coder Supported Hardware Intel FPGA and SoC Devices

0

answers

1 vote
3 views

Setup Linux® on the Xilinx Zynq hardware platform

Asked by Anirudh Acharya on 3 Nov 2016

Latest activity Commented on by Anirudh Acharya on 5 Nov 2017

Code Generation HDL Coder HDL Coder Supported Hardware AMD FPGA and SoC Devices

2

answers

0 votes
4 views

HDL coder Licencing.

Asked by swarup ghotekar on 1 Sep 2017

Latest activity Commented on by Walter Roberson on 4 Sep 2017

Code Generation HDL Coder HDL Coder Supported Hardware AMD FPGA and SoC Devices

2

answers

0 votes
9 views

Compatibility for Mathworks' and Xilinx tools integration (System Generator, Vivado, Support Package...)

Asked by Martin Dendaluce on 8 Dec 2014

Latest activity Answered by nagendra on 14 Mar 2017

Code Generation HDL Coder HDL Coder Supported Hardware AMD FPGA and SoC Devices

1

answer

0 votes
0 views

HDL Verifierでコシミュレーションする際のシミュレーション速度について

Asked by Shoumei on 10 Mar 2017

Latest activity Answered by Atsushi Matsumoto on 14 Mar 2017

Accepted Answer by Atsushi Matsumoto

Code Generation HDL Coder HDL Coder Supported Hardware AMD FPGA and SoC Devices

1

answer

0 votes
4 views

How to specify sample rates for Xilinx Zynq-Based Radio?

Asked by Johannes Kopp on 8 Nov 2016

Latest activity Answered by Neil MacEwen on 15 Feb 2017

Code Generation HDL Coder HDL Coder Supported Hardware AMD FPGA and SoC Devices

1

answer

0 votes
1 view

XADC in simulink hdl coder

Asked by rabei shwehdi on 28 Dec 2016

Latest activity Answered by Vishal Neelagiri on 3 Jan 2017

Accepted Answer by Vishal Neelagiri

Code Generation HDL Coder HDL Coder Supported Hardware AMD FPGA and SoC Devices

0

answers

0 votes
1 view

why am I recieving an error mesage when using HDL workflow advisor?

Asked by Cemil Yildiz on 21 Nov 2016

Code Generation HDL Coder HDL Coder Supported Hardware AMD FPGA and SoC Devices

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