Assign a single bit from STD_LOGIC_VECTOR to STD_LOGIC

Question

It seems like I have done this plenty of times, but for some reason today it just doesn't want to work.

I would like to assign the MSB of a 16-bit vector to a single-bit variable.

Din : in  STD_LOGIC_VECTOR (15 downto 0);

...

signal signBit : std_logic;

begin
    signBit <= Din(15 downto 15);

The error given is:

Type of signBit is incompatible with type of Din.

Yes I get it, vectors don't play nice with std_logic, but this is 1-bit, clearly denoted by (15 downto 15)

I assume there's a good reason you want to do this, and not just use Din(15). Even though your slice is only 1 bit, the fact that you're accessing it with downto makes it an array, not the scalar you expect. — fru1tbat
– fru1tbat, Commented Mar 28, 2014 at 18:22

user1818839 · Accepted Answer · 2014-03-28 18:23:19Z

17

Din(15 downto 15);

is a std_logic_vector, 1 bit long

Din(15);

is one element of a std_logic_vector, i.e. a std_logic.

answered Mar 28, 2014 at 18:23

user1818839

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1 Comment

Ahh, I was confused. Thanks