Synthesize Matlab function with large input and output onto FPGA

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I was given a matlab function that takes in two 8192x1 double float arrays and outputs a single 8192x1 double float array. It performs various signal conditioning functions on the input data. I need to deploy this to either a Digilent Zynq 7010 Dev Board, a Zedboard (which should have the same chip but is natively supported by Matlab), or a Kria KV260 SOM Eval Kit. The problem I've run into is even with my small modifications to the algorithm (I can't make any large charges other than single function changes to synthesizable functions), the final report I got from HDL Coder had multiple errors one of which being the most glaring:
IO Pin Count '344064' exceeds the IO Mapping Threshold '5000'.
Are there any options or settings in HDL coder that I can use to make the function synthesizeable. My only other option I see is trying to use Matlab coder to output C/C++ code, loading it into Vitis HLS, and trying to build in that fasion with pragmas deploying certain portions of computation to the PL side. In that case, is there a setting in Matlab Coder that will output all the necessary build files because my prior experience with Matlab Coder was that unless I exported as dynamic or static library, building was attrocious with calling internal libraries that I had to manually reference in the Matlab Installation directory.
Any assistance is greatly appreciated.

Answers (1)

Kiran Kintali
Kiran Kintali on 4 Jul 2023
Edited: Kiran Kintali on 4 Jul 2023
You have a large IO design (in frames); the design needs conversion to samples. Prior to R2022b release there was no automation possible and the frame to sample conversion was a manual step.
Starting R2022b release you can do this automatically for a subset of MATLAB and Simulink language. You can see some examples here https://www.mathworks.com/help/hdlcoder/examples.html?category=io-optimization
This capability also available with MATLAB designs.
Please reach out to tech support for additional help on this topic or share your design for specific guidance.

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R2023a

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