What does the ? do in Verilog?
For ex: what does that mean of the following command?
input first_din;
input [7:0] din;
output [127:0] parity;
reg [127:0] parity;
wire [7:0] feedback;
assign feedback = din ^ (first_din ? 8'b0 : parity[127:120]);
In this code, ? is part of the "Conditional operator" (?:). Refer to the free IEEE Std 1800-2012, Table 11-1—Operators and data types. It is used to model a multiplexer. In your case, first_din is the select, and 8'b0 and parity[127:120] are the data inputs.
Similar to ? : Operator in C, this operator works as simple if else block.
b = exp. a ? value_1 : value_2
equals to
if ( exp. a )//if true
b = value_1;
else
b = value_2;
This is like a typical multiplexer 2-to-1 .
Inputs : A , B , SEL
Outputs : OUT
Function :
IF (SEL = 1) THEN OUT = B , ELSE OUT = A
OUT = SEL ? B : A ;
Warning : if SEL = Z ( High impedance OR floating ) THEN OUT = A
This is the main difference with the typical multiplexer 2-to-1
The function of the Typical multiplexer 2-to-1 is:
IF (SEL = 1) THEN OUT = B , ELSE IF(SEL = 0) OUT = A ;
