convert a VHDL string to an integer ascii equivalent

Question

Suppose I have VHDL code that has a generic string STACK with the value "top". I want to pass it to a SystemVerilog module as a parameter, but SV does not have a type compatible with VHDL string. So I want to pass an integer generic with the ascii value of the string. If the string is "top", the integer value is 746F7020. If the string is "mid", the integer value is 6D696420. Is there a VHDL function or cast or something so I can instantiate the SV module with a generic like STACK => ascii_to_integer(STACK) ?

I've tried things like std_logic_vector(STACK) or integer'value(STACK), many other tries. I expect there's one simple answer that I just haven't found yet.

Can you explain how you generated the ASCII integer values for "top" and "mid"? — Tricky
– Tricky, Commented Jul 8 at 6:09

Community · Accepted Answer · 2025-07-08 07:30:45Z

0

I don't know any predefined function. But you can simply write your own function, which will produce this output:

ASCII of character t is 116
ASCII of character o is 111
ASCII of character p is 112
Complete integer is 116111112

library ieee;
use ieee.std_logic_1164.all;
entity test_string_to_integer is
end entity test_string_to_integer;
architecture struct of test_string_to_integer is
    function string_to_integer(str : string(1 to 3)) return integer is
        variable char_int : integer;
    begin
        char_int := 0;
        for i in 1 to 3 loop
            char_int := 1000*char_int + character'pos(str(i));
            report "ASCII of character " & str(i) & " is " & integer'image(character'pos(str(i)));
        end loop;
        report "Complete integer is " & integer'image(char_int);
        return char_int;
    end function;
    constant test_int : integer := string_to_integer("top");
begin
end architecture;

edited Jul 8 at 7:30

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answered Jul 8 at 7:04

Matthias Schweikart

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3 Comments

jmhiu Jul 9 at 13:38

I don't do decimal notation....

jmhiu Jul 9 at 13:41

VHDL generics and V/SV parameters are compile time. "top" and "mid" are just examples; in general they could be any 4 characters (for my purposes).

jmhiu Jul 9 at 13:44

And I think it should be quite obvious that the decimal expression for 746F7020 is 1,953,460,256...but, like I say, I don't do decimal.

jmhiu · Accepted Answer · 2025-07-09 15:13:42Z

turns out it can be as simple as
constant STACKSV : integer := ((character'pos(STACK(1))) * 256 * 256) + ((character'pos(STACK(2))) * 256) + ((character'pos(STACK(3))))
which for "int" produces 0x00746F70, which I can use, it's the integer equivalent of the V/SV "int".
That is, in my VHDL, pass generic STACK => STACKSV, and in the V/SV I can do if(STACK == "int") ...

Obviously, I could have shifted left 8 more bits and added 0x20, that would have answered the original question; but this actually is what I needed.

Now if someone could show me how in VHDL to do a left shift by 16 instead of a multiply by 256*256, and an OR instead of the addition, I'd be truly grateful. Given the strong typing of VHDL, I can't quite seem to get it right....

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