How to access values in a 2D array in Verilog?

Question

I need to use a 2D array for a coordinate system in a module, and I've created the test code below to test creating and accessing values in the array. This code should turn on an LED led output when the led output is 1'b1, but currently the LED stays off (I've troubleshooted all other code besides the 2D array stuff, it works when I use a 1D array here).

input clk;
reg [7:0] check[9:0];
reg ledreg;
output led;

initial begin
    check[0][0] = 1'b1;
    ledreg = 1'b0;
end

always @(posedge clk) begin
    if (check[0][0] == 1'b1) begin
        ledreg = 1'b1;
    end
end

assign led = ledreg;

I'm not sure if my array initialization syntax is off reg [7:0] check[9:0] or the value checking syntax is off check[0][0] == 1'b1, or if this is a SystemVerilog feature that doesn't work with just Verilog (I don't have SystemVerilog but this code compiles without error, so I don't think that's it).

How do I check a value in a 2D array so that I can do things when it has a certain value?

the code looks correct. is clk togging in your code? please make sure that it does. Also, please use non-blocking assignment <= in the posedge logic. — Serge
– Serge, Commented Jul 20, 2017 at 12:51
Are you running a simulation or directly of an FPGA? I remember trying to answer a prior question that turned out their FPGA reduced to read a single bit for a 2D array. Solution was to buffer the data into 1D array then read the bit. And FYI, you should initiate your entire array, not just the bits you use; add a for-loop assigning each entry to 0s at the top of initial block. — Greg
– Greg, Commented Jul 20, 2017 at 19:28

Ariyan Sharifi · Accepted Answer · 2017-07-21 14:46:10Z

2

for declaring a 2D reg in verilog this is more regular

reg [7:0] check[0:9]; //insted of reg [7:0] check[9:0]

and this mean you have 10 * 8bit regs

and you can assess to first 8bit by check[0] and you can access to 3rd bit of first element by check[0][3]

and yes you can ;)

answered Jul 21, 2017 at 14:46

Ariyan Sharifi

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venkat pasumarti · Accepted Answer · 2017-07-20 10:00:57Z

-1

your assigning a value in initial block that is why it is not accepting it. i have edit your code and check it

 module led(clk,led,address
        );
         input clk;
         input [3:0] address;
    reg [7:0] check[9:0];
    reg ledreg;
    output led;

    //  initial begin
    //    check[0] = 1;
    //    ledreg = 1'b0;
    //  end

        always@(posedge clk) begin
            check[0][0] = 1'b1;

        if ( check[0][0] == 1'b1) begin

            ledreg = 1'b1;
        end
        end
    assign led = ledreg;
    endmodule

this mite help you i have included an input signal for the 2D array.

module led(clk,led,address
    );
     input clk;
     input [3:0] address;
reg [7:0] check[9:0];
reg ledreg;
output led;

//  initial begin
//    check[0] = 1;
//    ledreg = 1'b0;
//  end

    always@(posedge clk) begin
        check[address] = 8'b11111111;

    if ( check[0][0] == 1'b1) begin

        ledreg = 1'b1;
    end
    end

    assign led = ledreg;


endmodule

the above code will assign data for the bite in the first row of the multi dimension array and then u can access it.

answered Jul 20, 2017 at 10:00

venkat pasumarti

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2 Comments

Serge Over a year ago

this suggestion makes no sense. it is as good as saying assing led = 1; and remove everything else.

venkat pasumarti Over a year ago

Yes But in my second Program i have given a address, we can able to store values where want in the array and we can use then. i am not concerned about the making led =1 i have concerned about only retrieving values from array.

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